Homemade Xilinx Parallel Cable III

I needed a Xilinx JTAG cable for my CPLD project. I looked up the schematics for Xilinx Parallel Cable III, and found out I already had the two ICs that were needed. I was going to build another PCB for the project anyhow, so I decided to make this one as well.

I designed it using my trusted gEDA suite (xgsch2pcb = gschem + pcb). I made a one-sided PCB, since it’s much easier to manfacture at home.

Electronic sidenote: actually I had HC125 and HC126, not two HC125. But since the only difference between 125 and 126 is the OE inputs negation, and only 1/4 of the other HC125 is used, I only slighlty modified the schematic and finally it worked just fine.

I fired up IMPACT of the Xilinx WebPack, and it sort of worked, because it detected my xc9536xl CPLD, but refused to program it:

ERROR:iMPACT:583 - '1': The idcode read from the device does not match
the idcode in the bsdl File.
INFO:iMPACT:1578 - '1': Device IDCODE :
00000100101100000001000001001001

INFO:iMPACT:1579 - '1': Expected IDCODE:
00001001011000000010000010010011

The idcodes looked alike, only as if shifted one bit. I took a closer look at the programmer, and found out I actually skipped one pull-up resistor at the TDO line, doh!

Here is how it looks, together with the fix. I know it’s not a work of art, but it gets the job done, and fits inside a standard DB-25 enclosure.