Binary counter in Verilog

I wanted to test out a Simple CPLD test board so I decided to try the simplest thing possible – a binary counter. I attached a 10xLED bar to a PCB and mounted it to a pin socket to use it as a display. By trial and error I was able to assemble a following piece of code:

module blink (clk25M, bar);
  input clk25M;
  output [9:0] bar;

  reg [30:0] cnt = 0;

  always @(posedge clk25M) begin
    cnt <= cnt + 1;
  end

  assign bar[9:0] = cnt[30:21];
endmodule

The clk25M input is a 25.175 MHz clock. It gets divided up into a “visible” spectrum of counting frequencies so that changes can be observed by human eye. I basically wire the LEDs to the bits of the counter register.

The result looks like this:

CPLD counter

And here is a short movie of the operation: